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Embedded SoPC Design with Nios II Processor and Verilog Examples - Pong P. Chu

Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog

An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well - allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.

Table of Contents: [762 Pag.]

1. Overview of Embedded System

PART I BASIC DIGITAL CIRCUITS DEVELOPMENT
2. Gate-level Combinational Circuit
3. Overview of FPGA and EDA Software
4. RT-level Combinational Circuit
5. Regular Sequential Circuit
6. FSM
7. FSMD
8. Selected Topics of Verilog

PART II BASIC NIOS II SOFTWARE DEVELOPMENT
9. Nios II Processor Overview
10. Nios II System Derivation and Low-Level Access
11. Predesigned Nios II I/O Peripherals
12. Predesigned Nios II I/O Drivers and HAL API
13. Interrupt and ISR

PART III CUSTOM I/O PERIPHERAL DEVELOPMENT
14. Custom I/O Peripheral with PIO Cores
15. Direct Digital Frequency Synthesis
16. SRAM and SDRAM Controllers
17. PS2 Keyboard and Mouse
18. VGA Controller
19. Audio Codec Controller
20. SD Card Controller

PART IV HARDWARE ACCELERATOR CASE STUDIES
21. GCD Accelerator
22. Mandelbrot Set Fractal Accelerator
23. Direct Digital Frequency Synthesis
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Download Link:   [30.7 MB]
*Mega:              OPCION 1OPCION 2  | OPCION 3




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